wip: probe Turing nwarps for low-bpw types (experiment, do not merge)

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xrip committed 2026-09-21 20:54:27 +03:00
1 parent 0b853410d8
commit dbe732c0a6
1 file changed
+12
+12
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@@ -565,6 +565,18 @@ static constexpr __host__ __device__ int calc_nwarps(ggml_type type, int ncols_d
case GGML_TYPE_Q6_K:
case GGML_TYPE_IQ4_XS:
return 2;
// EXPERIMENT: low-bpw types sit at 23-41% of the f16 bandwidth
// ceiling while these fast types reach 78-95%. They currently get
// nwarps=4. Probe both directions in one build:
// IQ2_XXS, IQ3_XXS -> 2 (fewer warps, less register pressure)
// IQ2_XS, IQ3_S -> 8 (more warps, more memory in flight)
// IQ2_S, IQ1_M -> 4 unchanged, as controls
case GGML_TYPE_IQ2_XXS:
case GGML_TYPE_IQ3_XXS:
return 2;
case GGML_TYPE_IQ2_XS:
case GGML_TYPE_IQ3_S:
return 8;
default:
return 4;
}